Test Bench << Logic Gate Simulator >>
This model allows the student to learn the different basic assemblies of combinatorial logic.
It is a practical support that allows to realize different simple assemblies of the combinational logic.
The model is protected by a fuse.
The model allows to perform the following manipulations:
AND; OR ; NOT; XOR; NAND; NOR; XNOR
* The model designed according to the unified national program of the LMD system is intended for students of the 2nd year undergraduate ST, the subject "combinatorial and sequential Logic TP" taught in semester S4.